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usr/src/linux-headers-5.15.0-133/arch/mips/include/asm/sn/addrs.h��0000644��00000031144�15030615101�0017715 0��ustar�00��/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1992 - 1997, 1999, 2000 Silicon Graphics, Inc. * Copyright (C) 1999, 2000 by Ralf Baechle / #ifndef _ASM_SN_ADDRS_H #define _ASM_SN_ADDRS_H #ifndef __ASSEMBLY__ #include <linux/smp.h> #include <linux/types.h> #endif / !__ASSEMBLY__ / #include <asm/addrspace.h> #include <asm/sn/kldir.h> #if defined(CONFIG_SGI_IP27) #include <asm/sn/sn0/addrs.h> #elif defined(CONFIG_SGI_IP35) #include <asm/sn/sn1/addrs.h> #endif #ifndef __ASSEMBLY__ #define UINT64_CAST (unsigned long) #else / __ASSEMBLY__ / #define UINT64_CAST #endif / __ASSEMBLY__ / #define NASID_GET_META(_n) ((_n) >> NASID_LOCAL_BITS) #ifdef CONFIG_SGI_IP27 #define NASID_GET_LOCAL(_n) ((_n) & 0xf) #endif #define NASID_MAKE(_m, _l) (((_m) << NASID_LOCAL_BITS) \| (_l)) #define NODE_ADDRSPACE_MASK (NODE_ADDRSPACE_SIZE - 1) #define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK) #define CHANGE_ADDR_NASID(_pa, _nasid) \ ((UINT64_CAST(_pa) & ~NASID_MASK) \| \ (UINT64_CAST(_nasid) << NASID_SHFT)) / * The following macros are used to index to the beginning of a specific * node's address space. / #define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS) #define NODE_CAC_BASE(_n) (CAC_BASE + NODE_OFFSET(_n)) #define NODE_HSPEC_BASE(_n) (HSPEC_BASE + NODE_OFFSET(_n)) #define NODE_IO_BASE(_n) (IO_BASE + NODE_OFFSET(_n)) #define NODE_MSPEC_BASE(_n) (MSPEC_BASE + NODE_OFFSET(_n)) #define NODE_UNCAC_BASE(_n) (UNCAC_BASE + NODE_OFFSET(_n)) #define TO_NODE(_n, _x) (NODE_OFFSET(_n) \| ((_x) )) #define TO_NODE_CAC(_n, _x) (NODE_CAC_BASE(_n) \| ((_x) & TO_PHYS_MASK)) #define TO_NODE_UNCAC(_n, _x) (NODE_UNCAC_BASE(_n) \| ((_x) & TO_PHYS_MASK)) #define TO_NODE_MSPEC(_n, _x) (NODE_MSPEC_BASE(_n) \| ((_x) & TO_PHYS_MASK)) #define TO_NODE_HSPEC(_n, _x) (NODE_HSPEC_BASE(_n) \| ((_x) & TO_PHYS_MASK)) #define RAW_NODE_SWIN_BASE(nasid, widget) \ (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) #define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff)) / * The following definitions pertain to the IO special address * space. They define the location of the big and little windows * of any given node. / #define SWIN_SIZE_BITS 24 #define SWIN_SIZE (UINT64_CAST 1 << 24) #define SWIN_SIZEMASK (SWIN_SIZE - 1) #define SWIN_WIDGET_MASK 0xF / * Convert smallwindow address to xtalk address. * * 'addr' can be physical or virtual address, but will be converted * to Xtalk address in the range 0 -> SWINZ_SIZEMASK / #define SWIN_WIDGETADDR(addr) ((addr) & SWIN_SIZEMASK) #define SWIN_WIDGETNUM(addr) (((addr) >> SWIN_SIZE_BITS) & SWIN_WIDGET_MASK) / * Verify if addr belongs to small window address on node with "nasid" * * * NOTE: "addr" is expected to be XKPHYS address, and NOT physical * address * * / #define NODE_SWIN_ADDR(nasid, addr) \ (((addr) >= NODE_SWIN_BASE(nasid, 0)) && \ ((addr) < (NODE_SWIN_BASE(nasid, HUB_NUM_WIDGET) + SWIN_SIZE)\ )) / * The following define the major position-independent aliases used * in SN. * UALIAS -- 256MB in size, reads in the UALIAS result in * uncached references to the memory of the reader's node. * CPU_UALIAS -- 128kb in size, the bottom part of UALIAS is flipped * depending on which CPU does the access to provide * all CPUs with unique uncached memory at low addresses. * LBOOT -- 256MB in size, reads in the LBOOT area result in * uncached references to the local hub's boot prom and * other directory-bus connected devices. * IALIAS -- 8MB in size, reads in the IALIAS result in uncached * references to the local hub's registers. / #define UALIAS_BASE HSPEC_BASE #define UALIAS_SIZE 0x10000000 / 256 Megabytes / #define UALIAS_LIMIT (UALIAS_BASE + UALIAS_SIZE) / * The bottom of ualias space is flipped depending on whether you're * processor 0 or 1 within a node. / #ifdef CONFIG_SGI_IP27 #define UALIAS_FLIP_BASE UALIAS_BASE #define UALIAS_FLIP_SIZE 0x20000 #define UALIAS_FLIP_BIT 0x10000 #define UALIAS_FLIP_ADDR(_x) (cputoslice(smp_processor_id()) ? \ (_x) ^ UALIAS_FLIP_BIT : (_x)) #define LBOOT_BASE (HSPEC_BASE + 0x10000000) #define LBOOT_SIZE 0x10000000 #define LBOOT_LIMIT (LBOOT_BASE + LBOOT_SIZE) #define LBOOT_STRIDE 0 / IP27 has only one CPU PROM / #endif #define HUB_REGISTER_WIDGET 1 #define IALIAS_BASE NODE_SWIN_BASE(0, HUB_REGISTER_WIDGET) #define IALIAS_SIZE 0x800000 / 8 Megabytes / #define IS_IALIAS(_a) (((_a) >= IALIAS_BASE) && \ ((_a) < (IALIAS_BASE + IALIAS_SIZE))) / * Macro for referring to Hub's RBOOT space / #ifdef CONFIG_SGI_IP27 #define RBOOT_SIZE 0x10000000 / 256 Megabytes / #define NODE_RBOOT_BASE(_n) (NODE_HSPEC_BASE(_n) + 0x30000000) #define NODE_RBOOT_LIMIT(_n) (NODE_RBOOT_BASE(_n) + RBOOT_SIZE) #endif / * Macros for referring the Hub's back door space * * These macros correctly process addresses in any node's space. * WARNING: They won't work in assembler. * * BDDIR_ENTRY_LO returns the address of the low double-word of the dir * entry corresponding to a physical (Cac or Uncac) address. * BDDIR_ENTRY_HI returns the address of the high double-word of the entry. * BDPRT_ENTRY returns the address of the double-word protection entry * corresponding to the page containing the physical address. * BDPRT_ENTRY_S Stores the value into the protection entry. * BDPRT_ENTRY_L Load the value from the protection entry. * BDECC_ENTRY returns the address of the ECC byte corresponding to a * double-word at a specified physical address. * BDECC_ENTRY_H returns the address of the two ECC bytes corresponding to a * quad-word at a specified physical address. / #define NODE_BDOOR_BASE(_n) (NODE_HSPEC_BASE(_n) + (NODE_ADDRSPACE_SIZE/2)) #define NODE_BDECC_BASE(_n) (NODE_BDOOR_BASE(_n)) #define NODE_BDDIR_BASE(_n) (NODE_BDOOR_BASE(_n) + (NODE_ADDRSPACE_SIZE/4)) #ifdef CONFIG_SGI_IP27 #define BDDIR_ENTRY_LO(_pa) ((HSPEC_BASE + \ NODE_ADDRSPACE_SIZE 3 / 4 + \ 0x200) \| \ UINT64_CAST(_pa) & NASID_MASK \| \ UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK \| \ UINT64_CAST(_pa) >> 3 & 0x1f << 4) #define BDDIR_ENTRY_HI(_pa) ((HSPEC_BASE + \ NODE_ADDRSPACE_SIZE * 3 / 4 + \ 0x208) \| \ UINT64_CAST(_pa) & NASID_MASK \| \ UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK \| \ UINT64_CAST(_pa) >> 3 & 0x1f << 4) #define BDPRT_ENTRY(_pa, _rgn) ((HSPEC_BASE + \ NODE_ADDRSPACE_SIZE * 3 / 4) \| \ UINT64_CAST(_pa) & NASID_MASK \| \ UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK \| \ (_rgn) << 3) #define BDPRT_ENTRY_ADDR(_pa, _rgn) (BDPRT_ENTRY((_pa), (_rgn))) #define BDPRT_ENTRY_S(_pa, _rgn, _val) ((__psunsigned_t )BDPRT_ENTRY((_pa), (_rgn))=(_val)) #define BDPRT_ENTRY_L(_pa, _rgn) ((__psunsigned_t )BDPRT_ENTRY((_pa), (_rgn))) #define BDECC_ENTRY(_pa) ((HSPEC_BASE + \ NODE_ADDRSPACE_SIZE / 2) \| \ UINT64_CAST(_pa) & NASID_MASK \| \ UINT64_CAST(_pa) >> 2 & BDECC_UPPER_MASK \| \ UINT64_CAST(_pa) >> 3 & 3) /* * Macro to convert a back door directory or protection address into the * raw physical address of the associated cache line or protection page. / #define BDADDR_IS_DIR(_ba) ((UINT64_CAST (_ba) & 0x200) != 0) #define BDADDR_IS_PRT(_ba) ((UINT64_CAST (_ba) & 0x200) == 0) #define BDDIR_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK \| \ (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2 \| \ (UINT64_CAST(_ba) & 0x1f << 4) << 3) #define BDPRT_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK \| \ (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2) #define BDECC_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK \| \ (UINT64_CAST(_ba) & BDECC_UPPER_MASK)<<2 \| \ (UINT64_CAST(_ba) & 3) << 3) #endif / CONFIG_SGI_IP27 / / * The following macros produce the correct base virtual address for * the hub registers. The LOCAL_HUB_* macros produce the appropriate * address for the local registers. The REMOTE_HUB_* macro produce * the address for the specified hub's registers. The intent is * that the appropriate PI, MD, NI, or II register would be substituted * for _x. / / * WARNING: * When certain Hub chip workaround are defined, it's not sufficient * to dereference the _HUB_ADDR() macros. You should instead use HUB_L() and HUB_S() if you must deal with pointers to hub registers. * Otherwise, the recommended approach is to use _HUB_L() and _HUB_S(). * They're always safe. / #define LOCAL_HUB_ADDR(_x) (IALIAS_BASE + (_x)) #define REMOTE_HUB_ADDR(_n, _x) ((NODE_SWIN_BASE(_n, 1) + 0x800000 + (_x))) #ifndef __ASSEMBLY__ #define LOCAL_HUB_PTR(_x) ((u64 )LOCAL_HUB_ADDR((_x))) #define REMOTE_HUB_PTR(_n, _x) ((u64 )REMOTE_HUB_ADDR((_n), (_x))) #define LOCAL_HUB_L(_r) __raw_readq(LOCAL_HUB_PTR(_r)) #define LOCAL_HUB_S(_r, _d) __raw_writeq((_d), LOCAL_HUB_PTR(_r)) #define REMOTE_HUB_L(_n, _r) __raw_readq(REMOTE_HUB_PTR((_n), (_r))) #define REMOTE_HUB_S(_n, _r, _d) __raw_writeq((_d), \ REMOTE_HUB_PTR((_n), (_r))) #endif / !__ASSEMBLY__ / / * Software structure locations -- permanently fixed * See diagram in kldir.h / #define PHYS_RAMBASE 0x0 #define K0_RAMBASE PHYS_TO_K0(PHYS_RAMBASE) #define EX_HANDLER_OFFSET(slice) ((slice) << 16) #define EX_HANDLER_ADDR(nasid, slice) \ PHYS_TO_K0(NODE_OFFSET(nasid) \| EX_HANDLER_OFFSET(slice)) #define EX_HANDLER_SIZE 0x0400 #define EX_FRAME_OFFSET(slice) ((slice) << 16 \| 0x400) #define EX_FRAME_ADDR(nasid, slice) \ PHYS_TO_K0(NODE_OFFSET(nasid) \| EX_FRAME_OFFSET(slice)) #define EX_FRAME_SIZE 0x0c00 #define ARCS_SPB_OFFSET 0x1000 #define ARCS_SPB_ADDR(nasid) \ PHYS_TO_K0(NODE_OFFSET(nasid) \| ARCS_SPB_OFFSET) #define ARCS_SPB_SIZE 0x0400 #define KLDIR_OFFSET 0x2000 #define KLDIR_ADDR(nasid) \ TO_NODE_UNCAC((nasid), KLDIR_OFFSET) #define KLDIR_SIZE 0x0400 / * Software structure locations -- indirected through KLDIR * See diagram in kldir.h * * Important: All low memory structures must only be accessed * uncached, except for the symmon stacks. / #define KLI_LAUNCH 0 / Dir. entries / #define KLI_KLCONFIG 1 #define KLI_NMI 2 #define KLI_GDA 3 #define KLI_FREEMEM 4 #define KLI_SYMMON_STK 5 #define KLI_PI_ERROR 6 #define KLI_KERN_VARS 7 #define KLI_KERN_XP 8 #define KLI_KERN_PARTID 9 #ifndef __ASSEMBLY__ #define KLD_BASE(nasid) ((kldir_ent_t ) KLDIR_ADDR(nasid)) #define KLD_LAUNCH(nasid) (KLD_BASE(nasid) + KLI_LAUNCH) #define KLD_NMI(nasid) (KLD_BASE(nasid) + KLI_NMI) #define KLD_KLCONFIG(nasid) (KLD_BASE(nasid) + KLI_KLCONFIG) #define KLD_PI_ERROR(nasid) (KLD_BASE(nasid) + KLI_PI_ERROR) #define KLD_GDA(nasid) (KLD_BASE(nasid) + KLI_GDA) #define KLD_SYMMON_STK(nasid) (KLD_BASE(nasid) + KLI_SYMMON_STK) #define KLD_FREEMEM(nasid) (KLD_BASE(nasid) + KLI_FREEMEM) #define KLD_KERN_VARS(nasid) (KLD_BASE(nasid) + KLI_KERN_VARS) #define KLD_KERN_XP(nasid) (KLD_BASE(nasid) + KLI_KERN_XP) #define KLD_KERN_PARTID(nasid) (KLD_BASE(nasid) + KLI_KERN_PARTID) #define LAUNCH_OFFSET(nasid, slice) \ (KLD_LAUNCH(nasid)->offset + \ KLD_LAUNCH(nasid)->stride * (slice)) #define LAUNCH_ADDR(nasid, slice) \ TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice)) #define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size #define SN_NMI_OFFSET(nasid, slice) \ (KLD_NMI(nasid)->offset + \ KLD_NMI(nasid)->stride * (slice)) #define NMI_ADDR(nasid, slice) \ TO_NODE_UNCAC((nasid), SN_NMI_OFFSET(nasid, slice)) #define NMI_SIZE(nasid) KLD_NMI(nasid)->size #define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset #define KLCONFIG_ADDR(nasid) \ TO_NODE_UNCAC((nasid), KLCONFIG_OFFSET(nasid)) #define KLCONFIG_SIZE(nasid) KLD_KLCONFIG(nasid)->size #define GDA_ADDR(nasid) KLD_GDA(nasid)->pointer #define GDA_SIZE(nasid) KLD_GDA(nasid)->size #define SYMMON_STK_OFFSET(nasid, slice) \ (KLD_SYMMON_STK(nasid)->offset + \ KLD_SYMMON_STK(nasid)->stride * (slice)) #define SYMMON_STK_STRIDE(nasid) KLD_SYMMON_STK(nasid)->stride #define SYMMON_STK_ADDR(nasid, slice) \ TO_NODE_CAC((nasid), SYMMON_STK_OFFSET(nasid, slice)) #define SYMMON_STK_SIZE(nasid) KLD_SYMMON_STK(nasid)->stride #define SYMMON_STK_END(nasid) (SYMMON_STK_ADDR(nasid, 0) + KLD_SYMMON_STK(nasid)->size) #define NODE_OFFSET_TO_K0(_nasid, _off) \ PHYS_TO_K0((NODE_OFFSET(_nasid) + (_off)) \| CAC_BASE) #define NODE_OFFSET_TO_K1(_nasid, _off) \ TO_UNCAC((NODE_OFFSET(_nasid) + (_off)) \| UNCAC_BASE) #define KERN_VARS_ADDR(nasid) KLD_KERN_VARS(nasid)->pointer #define KERN_VARS_SIZE(nasid) KLD_KERN_VARS(nasid)->size #endif /* !__ASSEMBLY__ / #endif / _ASM_SN_ADDRS_H / ��usr/src/linux-headers-5.15.0-133/arch/mips/include/asm/sn/sn0/addrs.h��0000644��00000022111�15030745775�0020434 0��ustar�00��/ * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Derived from IRIX <sys/SN/SN0/addrs.h>, revision 1.126. * * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc. * Copyright (C) 1999 by Ralf Baechle / #ifndef _ASM_SN_SN0_ADDRS_H #define _ASM_SN_SN0_ADDRS_H / * SN0 (on a T5) Address map * * This file contains a set of definitions and macros which are used * to reference into the major address spaces (CAC, HSPEC, IO, MSPEC, * and UNCAC) used by the SN0 architecture. It also contains addresses * for "major" statically locatable PROM/Kernel data structures, such as * the partition table, the configuration data structure, etc. * We make an implicit assumption that the processor using this file * follows the R10K's provisions for specifying uncached attributes; * should this change, the base registers may very well become processor- * dependent. * * For more information on the address spaces, see the "Local Resources" * chapter of the Hub specification. * * NOTE: This header file is included both by C and by assembler source * files. Please bracket any language-dependent definitions * appropriately. / / * Some of the macros here need to be casted to appropriate types when used * from C. They definitely must not be casted from assembly language so we * use some new ANSI preprocessor stuff to paste these on where needed. / / * The following couple of definitions will eventually need to be variables, * since the amount of address space assigned to each node depends on * whether the system is running in N-mode (more nodes with less memory) * or M-mode (fewer nodes with more memory). We expect that it will * be a while before we need to make this decision dynamically, though, * so for now we just use defines bracketed by an ifdef. / #ifdef CONFIG_SGI_SN_N_MODE #define NODE_SIZE_BITS 31 #define BWIN_SIZE_BITS 28 #define NASID_BITS 9 #define NASID_BITMASK (0x1ffLL) #define NASID_SHFT 31 #define NASID_META_BITS 5 #define NASID_LOCAL_BITS 4 #define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10) #define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3) #else / !defined(CONFIG_SGI_SN_N_MODE), assume that M-mode is desired / #define NODE_SIZE_BITS 32 #define BWIN_SIZE_BITS 29 #define NASID_BITMASK (0xffLL) #define NASID_BITS 8 #define NASID_SHFT 32 #define NASID_META_BITS 4 #define NASID_LOCAL_BITS 4 #define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) #define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) #endif / !defined(CONFIG_SGI_SN_N_MODE) / #define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) #define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) #define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ NASID_SHFT) & NASID_BITMASK) #if !defined(__ASSEMBLY__) #define NODE_SWIN_BASE(nasid, widget) \ ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \ : RAW_NODE_SWIN_BASE(nasid, widget)) #else / __ASSEMBLY__ / #define NODE_SWIN_BASE(nasid, widget) \ (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) #endif / __ASSEMBLY__ / / * The following definitions pertain to the IO special address * space. They define the location of the big and little windows * of any given node. / #define BWIN_INDEX_BITS 3 #define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) #define BWIN_SIZEMASK (BWIN_SIZE - 1) #define BWIN_WIDGET_MASK 0x7 #define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) #define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + \ (UINT64_CAST(bigwin) << BWIN_SIZE_BITS)) #define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) #define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) / * Verify if addr belongs to large window address of node with "nasid" * * * NOTE: "addr" is expected to be XKPHYS address, and NOT physical * address * * / #define NODE_BWIN_ADDR(nasid, addr) \ (((addr) >= NODE_BWIN_BASE0(nasid)) && \ ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + \ BWIN_SIZE))) / * The following define the major position-independent aliases used * in SN0. * CALIAS -- Varies in size, points to the first n bytes of memory * on the reader's node. / #define CALIAS_BASE CAC_BASE #define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid))) / Turn on sable logging for the processors whose bits are set. / #define SABLE_LOG_TRIGGER(_map) #ifndef __ASSEMBLY__ #define KERN_NMI_ADDR(nasid, slice) \ TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + \ (IP27_NMI_KREGS_CPU_SIZE (slice))) #endif /* !__ASSEMBLY__ / #ifdef PROM #define MISC_PROM_BASE PHYS_TO_K0(0x01300000) #define MISC_PROM_SIZE 0x200000 #define DIAG_BASE PHYS_TO_K0(0x01500000) #define DIAG_SIZE 0x300000 #define ROUTE_BASE PHYS_TO_K0(0x01800000) #define ROUTE_SIZE 0x200000 #define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000) #define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000) #define IP27PROM_CORP_MAX 32 #define IP27PROM_CORP PHYS_TO_K0(0x01800000) #define IP27PROM_CORP_SIZE 0x10000 #define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000) #define IP27PROM_CORP_STKSIZE 0x2000 #define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000) #define IP27PROM_DECOMP_SIZE 0xfff00 #define IP27PROM_BASE PHYS_TO_K0(0x01a00000) #define IP27PROM_BASE_MAPPED (UNCAC_BASE \| 0x1fc00000) #define IP27PROM_SIZE_MAX 0x100000 #define IP27PROM_PCFG PHYS_TO_K0(0x01b00000) #define IP27PROM_PCFG_SIZE 0xd0000 #define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000) #define IP27PROM_ERRDMP_SIZE 0xf000 #define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000) #define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000) #define IP27PROM_CONSOLE_SIZE 0x200 #define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200) #define IP27PROM_NETUART_SIZE 0x100 #define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300) #define IP27PROM_UNUSED1_SIZE 0x500 #define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800) #define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00) #define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000) #define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000) #define IP27PROM_STACK_SHFT 16 #define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT) #define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000) #define SLAVESTACK_BASE PHYS_TO_K0(0x01580000) #define SLAVESTACK_SIZE 0x40000 #define ENETBUFS_BASE PHYS_TO_K0(0x01f80000) #define ENETBUFS_SIZE 0x20000 #define IO6PROM_BASE PHYS_TO_K0(0x01c00000) #define IO6PROM_SIZE 0x400000 #define IO6PROM_BASE_MAPPED (UNCAC_BASE \| 0x11c00000) #define IO6DPROM_BASE PHYS_TO_K0(0x01c00000) #define IO6DPROM_SIZE 0x200000 #define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000) #define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000) #define IP27PROM_INT_LAUNCH 10 / and 11 / #define IP27PROM_INT_NETUART 12 / through 17 / #endif / PROM / / * needed by symmon so it needs to be outside #if PROM / #define IP27PROM_ELSC_SHFT 10 #define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT) / * This address is used by IO6PROM to build MemoryDescriptors of * free memory. This address is important since unix gets loaded * at this address, and this memory has to be FREE if unix is to * be loaded. / #define FREEMEM_BASE PHYS_TO_K0(0x2000000) #define IO6PROM_STACK_SHFT 14 / stack per cpu / #define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT) / * IP27 PROM vectors / #define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000) #define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008) #define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010) #define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018) #define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020) #define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028) #define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030) #define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038) #define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040) #define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048) #define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) / base of UART regs / #define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) / UART command reg / #define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) / UART data reg / #define KL_I2C_REG MD_UREG0_0 / I2C reg / #ifndef __ASSEMBLY__ / Address 0x400 to 0x1000 ualias points to cache error eframe + misc * CACHE_ERR_SP_PTR could either contain an address to the stack, or * the stack could start at CACHE_ERR_SP_PTR / #if defined(HUB_ERR_STS_WAR) #define CACHE_ERR_EFRAME 0x480 #else / HUB_ERR_STS_WAR / #define CACHE_ERR_EFRAME 0x400 #endif / HUB_ERR_STS_WAR / #define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE) #define CACHE_ERR_SP_PTR (0x1000 - 32) / why -32? TBD / #define CACHE_ERR_IBASE_PTR (0x1000 - 40) #define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16) #define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME) #endif / !__ASSEMBLY__ / #define _ARCSPROM #if defined(HUB_ERR_STS_WAR) #define ERR_STS_WAR_REGISTER IIO_IIBUSERR #define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) #define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR) / Used to match addr in error reg. / #define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS MD_BANK_SIZE) - 0x100) #endif /* HUB_ERR_STS_WAR / #endif / _ASM_SN_SN0_ADDRS_H */ ��

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