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PK��b�ZZ%�� internal.hnu��[��/* SPDX-License-Identifier: GPL-2.0 / / * FPU state and register content conversion primitives * * Copyright IBM Corp. 2015 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> / #ifndef _ASM_S390_FPU_INTERNAL_H #define _ASM_S390_FPU_INTERNAL_H #include <linux/string.h> #include <asm/ctl_reg.h> #include <asm/fpu/types.h> static inline void save_vx_regs(__vector128 vxrs) { asm volatile( " la 1,%0\n" " .word 0xe70f,0x1000,0x003e\n" /* vstm 0,15,0(1) / " .word 0xe70f,0x1100,0x0c3e\n" / vstm 16,31,256(1) / : "=Q" ((struct vx_array ) vxrs) : : "1"); } static inline void convert_vx_to_fp(freg_t fprs, __vector128 vxrs) { int i; for (i = 0; i < __NUM_FPRS; i++) fprs[i] = (freg_t )(vxrs + i); } static inline void convert_fp_to_vx(__vector128 vxrs, freg_t fprs) { int i; for (i = 0; i < __NUM_FPRS; i++) (freg_t )(vxrs + i) = fprs[i]; } static inline void fpregs_store(_s390_fp_regs fpregs, struct fpu fpu) { fpregs->pad = 0; fpregs->fpc = fpu->fpc; if (MACHINE_HAS_VX) convert_vx_to_fp((freg_t )&fpregs->fprs, fpu->vxrs); else memcpy((freg_t )&fpregs->fprs, fpu->fprs, sizeof(fpregs->fprs)); } static inline void fpregs_load(_s390_fp_regs fpregs, struct fpu fpu) { fpu->fpc = fpregs->fpc; if (MACHINE_HAS_VX) convert_fp_to_vx(fpu->vxrs, (freg_t )&fpregs->fprs); else memcpy(fpu->fprs, (freg_t )&fpregs->fprs, sizeof(fpregs->fprs)); } #endif / _ASM_S390_FPU_INTERNAL_H / PK��b�Zʈ` E��E��types.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / / * FPU data structures * * Copyright IBM Corp. 2015 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> / #ifndef _ASM_S390_FPU_TYPES_H #define _ASM_S390_FPU_TYPES_H #include <asm/sigcontext.h> struct fpu { __u32 fpc; / Floating-point control / void regs; /* Pointer to the current save area / union { / Floating-point register save area / freg_t fprs[__NUM_FPRS]; / Vector register save area / __vector128 vxrs[__NUM_VXRS]; }; }; / VX array structure for address operand constraints in inline assemblies / struct vx_array { __vector128 _[__NUM_VXRS]; }; / In-kernel FPU state structure / struct kernel_fpu { u32 mask; u32 fpc; union { freg_t fprs[__NUM_FPRS]; __vector128 vxrs[__NUM_VXRS]; }; }; #endif / _ASM_S390_FPU_TYPES_H / PK��b�Z�;e&}��}��regset.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / / * FPU regset handling methods: / #ifndef _ASM_X86_FPU_REGSET_H #define _ASM_X86_FPU_REGSET_H #include <linux/regset.h> extern user_regset_active_fn regset_fpregs_active, regset_xregset_fpregs_active; extern user_regset_get2_fn fpregs_get, xfpregs_get, fpregs_soft_get, xstateregs_get; extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set, xstateregs_set; / * xstateregs_active == regset_fpregs_active. Please refer to the comment * at the definition of regset_fpregs_active. / #define xstateregs_active regset_fpregs_active #endif / _ASM_X86_FPU_REGSET_H / PK��b�Z��[��sched.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _ASM_X86_FPU_SCHED_H #define _ASM_X86_FPU_SCHED_H #include <linux/sched.h> #include <asm/cpufeature.h> #include <asm/fpu/types.h> #include <asm/trace/fpu.h> extern void save_fpregs_to_fpstate(struct fpu fpu); extern void fpu__drop(struct fpu fpu); extern int fpu_clone(struct task_struct dst, unsigned long clone_flags); extern void fpu_flush_thread(void); /* * FPU state switching for scheduling. * * This is a two-stage process: * * - switch_fpu_prepare() saves the old state. * This is done within the context of the old process. * * - switch_fpu_finish() sets TIF_NEED_FPU_LOAD; the floating point state * will get loaded on return to userspace, or when the kernel needs it. * * If TIF_NEED_FPU_LOAD is cleared then the CPU's FPU registers * are saved in the current thread's FPU register state. * * If TIF_NEED_FPU_LOAD is set then CPU's FPU registers may not * hold current()'s FPU registers. It is required to load the * registers before returning to userland or using the content * otherwise. * * The FPU context is only stored/restored for a user task and * PF_KTHREAD is used to distinguish between kernel and user threads. / static inline void switch_fpu_prepare(struct fpu old_fpu, int cpu) { if (cpu_feature_enabled(X86_FEATURE_FPU) && !(current->flags & PF_KTHREAD)) { save_fpregs_to_fpstate(old_fpu); /* * The save operation preserved register state, so the * fpu_fpregs_owner_ctx is still @old_fpu. Store the * current CPU number in @old_fpu, so the next return * to user space can avoid the FPU register restore * when is returns on the same CPU and still owns the * context. / old_fpu->last_cpu = cpu; trace_x86_fpu_regs_deactivated(old_fpu); } } / * Delay loading of the complete FPU state until the return to userland. * PKRU is handled separately. / static inline void switch_fpu_finish(void) { if (cpu_feature_enabled(X86_FEATURE_FPU)) set_thread_flag(TIF_NEED_FPU_LOAD); } #endif / _ASM_X86_FPU_SCHED_H / PK��b�Z��(��(��xstate.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / #ifndef __ASM_X86_XSAVE_H #define __ASM_X86_XSAVE_H #include <linux/uaccess.h> #include <linux/types.h> #include <asm/processor.h> #include <asm/fpu/api.h> #include <asm/user.h> / Bit 63 of XCR0 is reserved for future expansion / #define XFEATURE_MASK_EXTEND (~(XFEATURE_MASK_FPSSE \| (1ULL << 63))) #define XSTATE_CPUID 0x0000000d #define TILE_CPUID 0x0000001d #define FXSAVE_SIZE 512 #define XSAVE_HDR_SIZE 64 #define XSAVE_HDR_OFFSET FXSAVE_SIZE #define XSAVE_YMM_SIZE 256 #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET) #define XSAVE_ALIGNMENT 64 / All currently supported user features / #define XFEATURE_MASK_USER_SUPPORTED (XFEATURE_MASK_FP \| \ XFEATURE_MASK_SSE \| \ XFEATURE_MASK_YMM \| \ XFEATURE_MASK_OPMASK \| \ XFEATURE_MASK_ZMM_Hi256 \| \ XFEATURE_MASK_Hi16_ZMM \| \ XFEATURE_MASK_PKRU \| \ XFEATURE_MASK_BNDREGS \| \ XFEATURE_MASK_BNDCSR \| \ XFEATURE_MASK_XTILE) / * Features which are restored when returning to user space. * PKRU is not restored on return to user space because PKRU * is switched eagerly in switch_to() and flush_thread() / #define XFEATURE_MASK_USER_RESTORE \ (XFEATURE_MASK_USER_SUPPORTED & ~XFEATURE_MASK_PKRU) / Features which are dynamically enabled for a process on request / #define XFEATURE_MASK_USER_DYNAMIC XFEATURE_MASK_XTILE_DATA / All currently supported supervisor features / #define XFEATURE_MASK_SUPERVISOR_SUPPORTED (XFEATURE_MASK_PASID) / * A supervisor state component may not always contain valuable information, * and its size may be huge. Saving/restoring such supervisor state components * at each context switch can cause high CPU and space overhead, which should * be avoided. Such supervisor state components should only be saved/restored * on demand. The on-demand supervisor features are set in this mask. * * Unlike the existing supported supervisor features, an independent supervisor * feature does not allocate a buffer in task->fpu, and the corresponding * supervisor state component cannot be saved/restored at each context switch. * * To support an independent supervisor feature, a developer should follow the * dos and don'ts as below: * - Do dynamically allocate a buffer for the supervisor state component. * - Do manually invoke the XSAVES/XRSTORS instruction to save/restore the * state component to/from the buffer. * - Don't set the bit corresponding to the independent supervisor feature in * IA32_XSS at run time, since it has been set at boot time. / #define XFEATURE_MASK_INDEPENDENT (XFEATURE_MASK_LBR) / * Unsupported supervisor features. When a supervisor feature in this mask is * supported in the future, move it to the supported supervisor feature mask. / #define XFEATURE_MASK_SUPERVISOR_UNSUPPORTED (XFEATURE_MASK_PT) / All supervisor states including supported and unsupported states. / #define XFEATURE_MASK_SUPERVISOR_ALL (XFEATURE_MASK_SUPERVISOR_SUPPORTED \| \ XFEATURE_MASK_INDEPENDENT \| \ XFEATURE_MASK_SUPERVISOR_UNSUPPORTED) / * The feature mask required to restore FPU state: * - All user states which are not eagerly switched in switch_to()/exec() * - The suporvisor states / #define XFEATURE_MASK_FPSTATE (XFEATURE_MASK_USER_RESTORE \| \ XFEATURE_MASK_SUPERVISOR_SUPPORTED) extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS]; extern void __init update_regset_xstate_info(unsigned int size, u64 xstate_mask); int xfeature_size(int xfeature_nr); void xsaves(struct xregs_state xsave, u64 mask); void xrstors(struct xregs_state xsave, u64 mask); int xfd_enable_feature(u64 xfd_err); #ifdef CONFIG_X86_64 DECLARE_STATIC_KEY_FALSE(__fpu_state_size_dynamic); #endif #ifdef CONFIG_X86_64 DECLARE_STATIC_KEY_FALSE(__fpu_state_size_dynamic); static __always_inline __pure bool fpu_state_size_dynamic(void) { return static_branch_unlikely(&__fpu_state_size_dynamic); } #else static __always_inline __pure bool fpu_state_size_dynamic(void) { return false; } #endif #endif PK��b�Z�M7��api.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / / * In-kernel FPU support functions * * * Consider these guidelines before using in-kernel FPU functions: * * 1. Use kernel_fpu_begin() and kernel_fpu_end() to enclose all in-kernel * use of floating-point or vector registers and instructions. * * 2. For kernel_fpu_begin(), specify the vector register range you want to * use with the KERNEL_VXR_* constants. Consider these usage guidelines: * * a) If your function typically runs in process-context, use the lower * half of the vector registers, for example, specify KERNEL_VXR_LOW. * b) If your function typically runs in soft-irq or hard-irq context, * prefer using the upper half of the vector registers, for example, * specify KERNEL_VXR_HIGH. * * If you adhere to these guidelines, an interrupted process context * does not require to save and restore vector registers because of * disjoint register ranges. * * Also note that the __kernel_fpu_begin()/__kernel_fpu_end() functions * includes logic to save and restore up to 16 vector registers at once. * * 3. You can nest kernel_fpu_begin()/kernel_fpu_end() by using different * struct kernel_fpu states. Vector registers that are in use by outer * levels are saved and restored. You can minimize the save and restore * effort by choosing disjoint vector register ranges. * * 5. To use vector floating-point instructions, specify the KERNEL_FPC * flag to save and restore floating-point controls in addition to any * vector register range. * * 6. To use floating-point registers and instructions only, specify the * KERNEL_FPR flag. This flag triggers a save and restore of vector * registers V0 to V15 and floating-point controls. * * Copyright IBM Corp. 2015 * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> / #ifndef _ASM_S390_FPU_API_H #define _ASM_S390_FPU_API_H #include <linux/preempt.h> void save_fpu_regs(void); void load_fpu_regs(void); void __load_fpu_regs(void); static inline int test_fp_ctl(u32 fpc) { u32 orig_fpc; int rc; asm volatile( " efpc %1\n" " sfpc %2\n" "0: sfpc %1\n" " la %0,0\n" "1:\n" EX_TABLE(0b,1b) : "=d" (rc), "=&d" (orig_fpc) : "d" (fpc), "0" (-EINVAL)); return rc; } #define KERNEL_FPC 1 #define KERNEL_VXR_V0V7 2 #define KERNEL_VXR_V8V15 4 #define KERNEL_VXR_V16V23 8 #define KERNEL_VXR_V24V31 16 #define KERNEL_VXR_LOW (KERNEL_VXR_V0V7\|KERNEL_VXR_V8V15) #define KERNEL_VXR_MID (KERNEL_VXR_V8V15\|KERNEL_VXR_V16V23) #define KERNEL_VXR_HIGH (KERNEL_VXR_V16V23\|KERNEL_VXR_V24V31) #define KERNEL_VXR (KERNEL_VXR_LOW\|KERNEL_VXR_HIGH) #define KERNEL_FPR (KERNEL_FPC\|KERNEL_VXR_LOW) struct kernel_fpu; / * Note the functions below must be called with preemption disabled. * Do not enable preemption before calling __kernel_fpu_end() to prevent * an corruption of an existing kernel FPU state. * * Prefer using the kernel_fpu_begin()/kernel_fpu_end() pair of functions. / void __kernel_fpu_begin(struct kernel_fpu state, u32 flags); void __kernel_fpu_end(struct kernel_fpu state, u32 flags); static inline void kernel_fpu_begin(struct kernel_fpu state, u32 flags) { preempt_disable(); state->mask = S390_lowcore.fpu_flags; if (!test_cpu_flag(CIF_FPU)) /* Save user space FPU state and register contents / save_fpu_regs(); else if (state->mask & flags) / Save FPU/vector register in-use by the kernel / __kernel_fpu_begin(state, flags); S390_lowcore.fpu_flags \|= flags; } static inline void kernel_fpu_end(struct kernel_fpu state, u32 flags) { S390_lowcore.fpu_flags = state->mask; if (state->mask & flags) /* Restore FPU/vector register in-use by the kernel / __kernel_fpu_end(state, flags); preempt_enable(); } #endif / _ASM_S390_FPU_API_H / PK��b�Zɰ��signal.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / / * x86 FPU signal frame handling methods: / #ifndef _ASM_X86_FPU_SIGNAL_H #define _ASM_X86_FPU_SIGNAL_H #include <linux/compat.h> #include <linux/user.h> #include <asm/fpu/types.h> #ifdef CONFIG_X86_64 # include <uapi/asm/sigcontext.h> # include <asm/user32.h> struct ksignal; int ia32_setup_rt_frame(int sig, struct ksignal ksig, compat_sigset_t set, struct pt_regs regs); int ia32_setup_frame(int sig, struct ksignal ksig, compat_sigset_t set, struct pt_regs regs); #else # define user_i387_ia32_struct user_i387_struct # define user32_fxsr_struct user_fxsr_struct # define ia32_setup_frame __setup_frame # define ia32_setup_rt_frame __setup_rt_frame #endif extern void convert_from_fxsr(struct user_i387_ia32_struct env, struct task_struct tsk); extern void convert_to_fxsr(struct fxregs_state fxsave, const struct user_i387_ia32_struct env); unsigned long fpu__alloc_mathframe(unsigned long sp, int ia32_frame, unsigned long buf_fx, unsigned long size); unsigned long fpu__get_fpstate_size(void); extern bool copy_fpstate_to_sigframe(void __user buf, void __user fp, int size); extern void fpu__clear_user_states(struct fpu fpu); extern bool fpu__restore_sig(void __user buf, int ia32_frame); extern void restore_fpregs_from_fpstate(struct fpstate fpstate, u64 mask); extern bool copy_fpstate_to_sigframe(void __user buf, void __user fp, int size); #endif /* _ASM_X86_FPU_SIGNAL_H / PK��b�Z��xcr.hnu��[��/ SPDX-License-Identifier: GPL-2.0 / #ifndef _ASM_X86_FPU_XCR_H #define _ASM_X86_FPU_XCR_H #define XCR_XFEATURE_ENABLED_MASK 0x00000000 static inline u64 xgetbv(u32 index) { u32 eax, edx; asm volatile("xgetbv" : "=a" (eax), "=d" (edx) : "c" (index)); return eax + ((u64)edx << 32); } static inline void xsetbv(u32 index, u64 value) { u32 eax = value; u32 edx = value >> 32; asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index)); } #endif / _ASM_X86_FPU_XCR_H */ PK��b�ZZ%�� internal.hnu��[��PK��b�Zʈ` E��E��types.hnu��[��PK��b�Z�;e&}��}��v ��regset.hnu��[��PK��b�Z��[��+��sched.hnu��[��PK��b�Z��(��(��s��xstate.hnu��[��PK��b�Z�M7��$��api.hnu��[��PK��b�Zɰ��4��signal.hnu��[��PK��b�Z��:��xcr.hnu��[��PK��:��&<��

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