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usr/src/linux-headers-5.15.0-142/arch/mips/include/asm/mmiowb.h 0000644 00000000305 15030355475 0017504 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_MMIOWB_H #define _ASM_MMIOWB_H #include <asm/io.h> #define mmiowb() iobarrier_w() #include <asm-generic/mmiowb.h> #endif /* _ASM_MMIOWB_H */ usr/src/linux-headers-5.15.0-133/arch/ia64/include/asm/mmiowb.h 0000644 00000000661 15030373370 0017276 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_IA64_MMIOWB_H #define _ASM_IA64_MMIOWB_H /** * mmiowb - I/O write barrier * * Ensure ordering of I/O space writes. This will make sure that writes * following the barrier will arrive after all previous writes. For most * ia64 platforms, this is a simple 'mf.a' instruction. */ #define mmiowb() ia64_mfa() #include <asm-generic/mmiowb.h> #endif /* _ASM_IA64_MMIOWB_H */ usr/src/linux-headers-5.15.0-141/arch/mips/include/asm/mmiowb.h 0000644 00000000305 15030477535 0017505 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_MMIOWB_H #define _ASM_MMIOWB_H #include <asm/io.h> #define mmiowb() iobarrier_w() #include <asm-generic/mmiowb.h> #endif /* _ASM_MMIOWB_H */ usr/src/linux-headers-5.15.0-133/arch/sh/include/asm/mmiowb.h 0000644 00000000366 15030557714 0017155 0 ustar 00 /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_SH_MMIOWB_H #define __ASM_SH_MMIOWB_H #include <asm/barrier.h> /* synco on SH-4A, otherwise a nop */ #define mmiowb() wmb() #include <asm-generic/mmiowb.h> #endif /* __ASM_SH_MMIOWB_H */
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